[coreboot-gerrit] Change in coreboot[master]: arch/x86: Fix S3 resume without stage cache

[Kyösti Mälkki (Code Review)]

Hello Mike Banon, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/37683

to look at the new patch set (#8).

Change subject: arch/x86: Fix S3 resume without stage cache
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arch/x86: Fix S3 resume without stage cache

It was possible to have NO_STAGE_CACHE=n and at the same time have
TSEG_STAGE_CACHE=n and CBMEM_STAGE_CACHE=n. This resulted with a
failing attempt to load STAGE_POSTCAR from the stage cache, but not
loading it from CBFS either.

Make it a three-way choice between different STAGE_CACHE options.
For AGESA disable CBMEM_STAGE_CACHE by default, as it is no longer
needed to have functional ACPI S3 resume and it is not allowed
se use keyword select for symbols inside choice blocks.

Change-Id: I0da3e1cf4c92817ffabbb02eda3476ecdfdfa278
Signed-off-by: Kyösti Mälkki 
---
M src/Kconfig
M src/cpu/amd/agesa/Kconfig
2 files changed, 17 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/37683/8