[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/meteorlake: Allow option to perform CSE sync at romstage

[Subrata Banik (Code Review)]

Attention is currently required from: Anil Kumar K, Tarun Tuli, Jamie Ryu, Paul Menzel, Kapil Porwal, Sridhar Siricilla.

Subrata Banik has uploaded a new patch set (#8) to the change originally created by Anil Kumar K. ( https://review.coreboot.org/c/coreboot/+/74763 )

Change subject: soc/intel/meteorlake: Allow option to perform CSE sync at romstage
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soc/intel/meteorlake: Allow option to perform CSE sync at romstage

The change 'commit 248dbe0908f1b ("Trigger cse_fw_sync before
DRAM Init")' adds change to enable CSE FW sync in ROMSTAGE i.e.
before DRAM initialization.

Although the goal is to perform CSE sync in Meteor Lake using ramstage
to avoid doing more intensive operations like CS sync at pre-memory
stage. Hence, Meteor Lake SoC selects config option
SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE to perform CSE sync from ramstage.

BUG=b:273207144
BRANCH=none

Signed-off-by: Anil Kumar 
Change-Id: I8e603a2ecf1a67ee7c683b440072889d137f9de0
---
M src/soc/intel/meteorlake/romstage/romstage.c
1 file changed, 23 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/74763/8