[coreboot-gerrit] Change in coreboot[master]: [NEED RETEST] soc/intel/common/block/systemagent/memmap.c: Align cach...

[Angel Pons (Code Review)]

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45930

to look at the new patch set (#3).

Change subject: [NEED RETEST] soc/intel/common/block/systemagent/memmap.c: Align cached region
......................................................................

[NEED RETEST] soc/intel/common/block/systemagent/memmap.c: Align cached region

When asked to place cbmem_top(), FSP does not seem to care about
alignment. It can return an address that is MTRR poison, which will
exhaust all variable MTRRs when trying to set up caching for CBMEM.
This will make memory-mapped flash and TSEG caching fail as well.

Safeguard against this by aligning the region to cache to half of its
size, and move it upwards to compensate. It is assumed that caching
memory above the provided bootloader TOLUM address is inconsequential.

TEST=Boot out-of-tree Skylake board, observe no MTRR exhaustion error
     messages in console. The boot process also feels more fluid.

Change-Id: Ic64fd6d3d9e8ab4c78d68b910a476f9c4eb2d353
Signed-off-by: Angel Pons 
---
M src/soc/intel/common/block/systemagent/memmap.c
1 file changed, 6 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/45930/3