[coreboot-gerrit] [M] Change in coreboot[main]: mb/siemens/mc_ehl3: Use PSE GbE 0 instead of PSE GbE 1

[Jan Samek (Code Review)]

Attention is currently required from: Johannes Hahn, Mario Scheithauer, Werner Zeh.

Jan Samek has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80186?usp=email )

Change subject: mb/siemens/mc_ehl3: Use PSE GbE 0 instead of PSE GbE 1
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Patch Set 2:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/80186/comment/ec117cc5_800a1b9d :
PS1, Line 10: 1
> 0

Done

File src/mainboard/siemens/mc_ehl/variants/mc_ehl3/gpio.c:

https://review.coreboot.org/c/coreboot/+/80186/comment/7be8f399_9102e2b4 :
PS1, Line 111: 	PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),		/* PSE_GBE0_AUXTS */
             : 	PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),		/* PSE_GBE0_PPS */
> I think C6 and C7 belong to GBE1. You should be able to set both to NC.

Done