Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40817 )
Change subject: mb/google/kahlee: Start PCIe reset sooner on careena devices ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/40817/1/src/mainboard/google/kahlee... File src/mainboard/google/kahlee/variants/careena/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/40817/1/src/mainboard/google/kahlee... PS1, Line 17: romstage-y += variant.c Sorry Kevin, didn't mean to push this as part of this patch.
https://review.coreboot.org/c/coreboot/+/40817/1/src/mainboard/google/kahlee... File src/mainboard/google/kahlee/variants/careena/variant.c:
https://review.coreboot.org/c/coreboot/+/40817/1/src/mainboard/google/kahlee... PS1, Line 38: pm_write8(PM_RST_CMD, pm_read8(PM_RST_CMD) | PM_RESET_PCIE); We probably want to add a check for Board ID here as well.