Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8749
-gerrit
commit a8d4c02d3a158cbe9b7d180cb696fbf3719adf56 Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Thu Mar 19 06:58:15 2015 +0200
CBMEM: Add LATE_CBMEM_INIT guards
Our target is to get rid of backup_top_of_ram() and get_top_of_ram() entirely so only declare these with LATE_CBMEM_INIT=y.
Change-Id: I54f549fe774996f4d803f9ec527e0fac46f6576f Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/southbridge/amd/agesa/hudson/ramtop.c | 4 ++++ src/southbridge/amd/cimx/sb700/lpc.c | 3 +++ src/southbridge/amd/cimx/sb800/ramtop.c | 4 ++++ src/southbridge/amd/sb700/early_setup.c | 2 ++ src/southbridge/amd/sb700/lpc.c | 2 ++ src/southbridge/amd/sb800/early_setup.c | 2 ++ src/southbridge/via/k8t890/host_ctrl.c | 6 +++++- 7 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/southbridge/amd/agesa/hudson/ramtop.c b/src/southbridge/amd/agesa/hudson/ramtop.c index 182150f..79d033f 100644 --- a/src/southbridge/amd/agesa/hudson/ramtop.c +++ b/src/southbridge/amd/agesa/hudson/ramtop.c @@ -30,6 +30,8 @@ int acpi_get_sleep_type(void) return (int)tmp; }
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) + #ifndef __PRE_RAM__ void backup_top_of_ram(uint64_t ramtop) { @@ -57,3 +59,5 @@ unsigned long get_top_of_ram(void) } return (unsigned long) xdata; } + +#endif diff --git a/src/southbridge/amd/cimx/sb700/lpc.c b/src/southbridge/amd/cimx/sb700/lpc.c index 75a3fb9..f730e28 100644 --- a/src/southbridge/amd/cimx/sb700/lpc.c +++ b/src/southbridge/amd/cimx/sb700/lpc.c @@ -24,6 +24,8 @@ #include <console/console.h> /* printk */ #include <cbmem.h>
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) + #define BIOSRAM_INDEX 0xcd4 #define BIOSRAM_DATA 0xcd5
@@ -37,6 +39,7 @@ void backup_top_of_ram(uint64_t ramtop) nvram_pos++; } } +#endif
void lpc_read_resources(device_t dev) { diff --git a/src/southbridge/amd/cimx/sb800/ramtop.c b/src/southbridge/amd/cimx/sb800/ramtop.c index 7e9abae..0d811ab 100644 --- a/src/southbridge/amd/cimx/sb800/ramtop.c +++ b/src/southbridge/amd/cimx/sb800/ramtop.c @@ -30,6 +30,8 @@ int acpi_get_sleep_type(void) return (int)tmp; }
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) + #ifndef __PRE_RAM__ void backup_top_of_ram(uint64_t ramtop) { @@ -57,3 +59,5 @@ unsigned long get_top_of_ram(void) } return (unsigned long) xdata; } + +#endif diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index 94f33b7..50909f8 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -728,6 +728,7 @@ int acpi_get_sleep_type(void) return ((tmp & (7 << 10)) >> 10); }
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) unsigned long get_top_of_ram(void) { uint32_t xdata = 0; @@ -742,5 +743,6 @@ unsigned long get_top_of_ram(void) } return (unsigned long) xdata; } +#endif
#endif diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 658e954..7bb21d2 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -88,6 +88,7 @@ int acpi_get_sleep_type(void) return ((tmp & (7 << 10)) >> 10); }
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) void backup_top_of_ram(uint64_t ramtop) { u32 dword = (u32) ramtop; @@ -98,6 +99,7 @@ void backup_top_of_ram(uint64_t ramtop) nvram_pos++; } } +#endif
static void sb700_lpc_read_resources(device_t dev) { diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index 69bc3bd..f9eed11 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -673,6 +673,7 @@ int acpi_get_sleep_type(void) return ((tmp & (7 << 10)) >> 10); }
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) unsigned long get_top_of_ram(void) { uint32_t xdata = 0; @@ -687,5 +688,6 @@ unsigned long get_top_of_ram(void) } return (unsigned long) xdata; } +#endif
#endif diff --git a/src/southbridge/via/k8t890/host_ctrl.c b/src/southbridge/via/k8t890/host_ctrl.c index 2f4bca7..27ae0ab 100644 --- a/src/southbridge/via/k8t890/host_ctrl.c +++ b/src/southbridge/via/k8t890/host_ctrl.c @@ -113,9 +113,13 @@ static void host_ctrl_enable_k8m8xx(struct device *dev) { pci_write_config8(dev, 0xa6, 0x83);
} -void backup_top_of_ram(uint64_t ramtop) { + +#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) +void backup_top_of_ram(uint64_t ramtop) +{ outl((u32) ramtop, K8T890_NVRAM_IO_BASE+K8T890_NVRAM_TOP_OF_RAM); } +#endif
static struct pci_operations lops_pci = { .set_subsystem = pci_dev_set_subsystem,