Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35523 )
Change subject: mb/acer: Add Acer Aspire VN7-572G ......................................................................
Patch Set 120:
(6 comments)
https://review.coreboot.org/c/coreboot/+/35523/119//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35523/119//COMMIT_MSG@12 PS119, Line 12: - Booting Fedora 31 using TianoCore (CorebootPayload)
What Linux kernel version does it ship?
Done
https://review.coreboot.org/c/coreboot/+/35523/119/src/mainboard/acer/aspire... File src/mainboard/acer/aspire_vn7_572g/Kconfig:
https://review.coreboot.org/c/coreboot/+/35523/119/src/mainboard/acer/aspire... PS119, Line 13: # TODO: select DRIVERS_NVIDIA_OPTIMUS
more TODO
Optimus support is implemented in CB:28380 and is not yet merged.
Also see above (on dsdt.asl, regarding optimus_mb.asl).
https://review.coreboot.org/c/coreboot/+/35523/119/src/mainboard/acer/aspire... PS119, Line 75: #config TPM_PIRQ : # hex : # default 0x1e # GPP_A6_IRQ
remove if unused?
The schematics specify a Nuvoton NPCT650 appearing on the LPC bus.
However, the model that I own does not have this chip. If it did, this pin would be its interrupt.
I'm not sure whether this should stay or be removed.
https://review.coreboot.org/c/coreboot/+/35523/62/src/mainboard/acer/aspire_... File src/mainboard/acer/aspire_vn7_572g/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/35523/62/src/mainboard/acer/aspire_... PS62, Line 58: 2
Ack. I wonder if the issue with the Purism Librem is due to lack of HSIO tuning or just bad design. […]
I resolved this by enabling "SataPwrOptEnable"
https://review.coreboot.org/c/coreboot/+/35523/119/src/mainboard/acer/aspire... File src/mainboard/acer/aspire_vn7_572g/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/35523/119/src/mainboard/acer/aspire... PS119, Line 140: # TODO: register "PcieRpAspm[9]" = "ASPM_L1" : # TODO: register "PcieRpL1Substates[9]" = "L1_SS_DISABLED"
lets resolve these TODOs (and the one above) is possible before merge
This depends upon CB:39538.
The microphone, however, is more complicated. I can assume that the vendor is using that UPD to enable the microphone as none of the HDA pin_cfgs address a microphone and I'm including all of their undocumented verbs (extracted from the InstallPchHdaVerbTablePei module).
However, the microphone isn't working even with the vendor firmware.
https://review.coreboot.org/c/coreboot/+/35523/119/src/mainboard/acer/aspire... File src/mainboard/acer/aspire_vn7_572g/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/35523/119/src/mainboard/acer/aspire... PS119, Line 29: // #include "acpi/optimus_mb.asl"
the file is in this patch, so is it just not working or?
Optimus support depends upon CB:28380 and requires implementation per-SoC. I've attempted to write peg.asl for Skylake (CB:40625), but with this applied, the dGPU does not appear in the OS at all.