Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46387 )
Change subject: soc/mediatek/mt8192: Turn off L2C SRAM and reconfigure as L2 cache ......................................................................
Patch Set 7:
(5 comments)
https://review.coreboot.org/c/coreboot/+/46387/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46387/6//COMMIT_MSG@7 PS6, Line 7: return it to
reconfigure as
Ack
https://review.coreboot.org/c/coreboot/+/46387/6//COMMIT_MSG@9 PS6, Line 9: of
of the
Ack
https://review.coreboot.org/c/coreboot/+/46387/6//COMMIT_MSG@9 PS6, Line 9: DRAM ready
DRAM is ready
Ack
https://review.coreboot.org/c/coreboot/+/46387/6//COMMIT_MSG@10 PS6, Line 10: disable_l2c_sram is called to return SRAM to L2 cache
we should invoke disable_l2c_sram to reconfigure the L2C SRAM as L2 cache.
Ack
https://review.coreboot.org/c/coreboot/+/46387/6//COMMIT_MSG@10 PS6, Line 10: DRAM ready
DRAM is ready
Ack