Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45336 )
Change subject: soc/intel/common/basecode: Add Intel common reset code ......................................................................
Patch Set 9:
(4 comments)
https://review.coreboot.org/c/coreboot/+/45336/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45336/5//COMMIT_MSG@7 PS5, Line 7: soc/intel/common/block
@Furquan see https://review.coreboot. […]
@Furquan, please look at https://review.coreboot.org/c/coreboot/+/45541/1, its taken care
https://review.coreboot.org/c/coreboot/+/45336/8/src/soc/intel/common/baseco... File src/soc/intel/common/basecode/reset/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/45336/8/src/soc/intel/common/baseco... PS8, Line 4: endif
postcar being such a thin stage, do we see any scope for global reset. so far reset. […]
Ack
https://review.coreboot.org/c/coreboot/+/45336/8/src/soc/intel/common/baseco... File src/soc/intel/common/basecode/reset/reset.c:
https://review.coreboot.org/c/coreboot/+/45336/8/src/soc/intel/common/baseco... PS8, Line 11: do_global_reset
well, IMHO that should be reworded, too :S see what I wrote here https://review.coreboot. […]
Ack
https://review.coreboot.org/c/coreboot/+/45336/8/src/soc/intel/common/baseco... PS8, Line 22: /* Now BIOS can write 0x06 or 0x0E to 0xCF9 port to global reset platform */
I might be weird, but I like to have a comment explaining why `do_full_reset` doesn't do a full rese […]
Ack