[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add SSDT generation for Intel USB4 PCIe ports

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44915 )

Change subject: soc/intel/common: Add SSDT generation for Intel USB4 PCIe ports
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Patch Set 12:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44915/12/src/soc/intel/common/block... 
File src/soc/intel/common/block/usb4/pcie.c:

https://review.coreboot.org/c/coreboot/+/44915/12/src/soc/intel/common/block... 
PS12, Line 83: scan_generic_bus
Should this be scan_static_bus since that will allow walking downstream from the child in case it is a bridge.