Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32131 )
Change subject: arch/x86/smbios: Add type 7 ......................................................................
Patch Set 2:
Patch Set 2:
the following is the whiskeylake CPU I get Handle 0x0005, DMI type 7, 25 bytes Cache Information Socket Designation: CACHE0 Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Varies With Memory Address Location: Internal Installed Size: 0 kB Maximum Size: 32768 kB Supported SRAM Types: Unknown Installed SRAM Type: None Speed: 4 ns Error Correction Type: <OUT OF SPEC> System Type: <OUT OF SPEC> Associativity: <OUT OF SPEC>
Handle 0x0006, DMI type 7, 25 bytes Cache Information Socket Designation: CACHE1 Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Varies With Memory Address Location: Internal Installed Size: 0 kB Maximum Size: 32768 kB Supported SRAM Types: Unknown Installed SRAM Type: None Speed: 3 ns Error Correction Type: <OUT OF SPEC> System Type: <OUT OF SPEC> Associativity: <OUT OF SPEC>
Handle 0x0007, DMI type 7, 25 bytes Cache Information Socket Designation: CACHE2 Configuration: Enabled, Not Socketed, Level 3 Operational Mode: Varies With Memory Address Location: Internal Installed Size: 256 kB Maximum Size: 294912 kB Supported SRAM Types: Unknown Installed SRAM Type: None Speed: 5 ns Error Correction Type: Single-bit ECC System Type: Data Associativity: <OUT OF SPEC>
Dmidecode report that at the end
Wrong DMI structures count: 16 announced, only 12 decoded. Wrong DMI structures length: 626 bytes announced, structures occupy 657 bytes.