Hello build bot (Jenkins), Nico Huber, Angel Pons, Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42916
to look at the new patch set (#12).
Change subject: supermicro/x11-lga1151/gpio: 1/4 Decode raw register values ......................................................................
supermicro/x11-lga1151/gpio: 1/4 Decode raw register values
Use the intelp2m utility [1,2] with -fld=cb options to convert the pad configuration format with the raw values of the DW0 and DW1 registers to the format with the bit fields macros: PAD_FUNC(), PAD_RESET(), PAD_TRIG(), PAD_BUF(), PAD_PULL(), etc... Also use the -ii options to generate the target macro in the comments, so that it is easier to understand what result we should get:
./intelp2m -ii -fld cb -t 1 -p snr -file ../../src/mainboard/supermicro/ x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h
./intelp2m -ii -fld cb -t 1 -p snr -file ../../src/mainboard/supermicro/ x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h
[1] https://github.com/maxpoliak/pch-pads-parser [2] https://review.coreboot.org/c/coreboot/+/35643
This is part of the patch set "mb/supermicro/x11-lga1151: Rewrite pad config using intelp2m":
CB:42916 - 1/4 Decode raw register values CB:42917 - 2/4 Exclude fields for PAD_CFG CB:42918 - 3/4 Fixes some field macro CB:35679 - 4/4 Convert field macros to PAD_CFG
Tested with BUILD_TIMELESS=1, Supermicro X11SSH-TF and X11SSM-F, remains identical.
Change-Id: I209ecdca75a0e62233d3726942c75ea06acc40a2 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/include/variant/gpio.h 2 files changed, 2,319 insertions(+), 431 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/42916/12