[coreboot-gerrit] [S] Change in coreboot[main]: mb/google/rex/var/kanix: Update LAN settings for EVT

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86072?usp=email )

Change subject: mb/google/rex/var/kanix: Update LAN settings for EVT
......................................................................

mb/google/rex/var/kanix: Update LAN settings for EVT

According to the EVT's circuit design changes, update the following LAN
settings:
1. set root port to 7
2. set clock source/request to 2

BUG=b:386025819
BRANCH=firmware-rex-15709.B

Change-Id: Ia8be74c601a536f1aa932dd6c14ae3f5068d0a7f
Signed-off-by: Kenneth Chan 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86072
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/rex/variants/kanix/overridetree.cb
1 file changed, 5 insertions(+), 5 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Subrata Banik: Looks good to me, approved

diff --git a/src/mainboard/google/rex/variants/kanix/overridetree.cb b/src/mainboard/google/rex/variants/kanix/overridetree.cb
index a8ca721..4f912d8 100644
--- a/src/mainboard/google/rex/variants/kanix/overridetree.cb
+++ b/src/mainboard/google/rex/variants/kanix/overridetree.cb
@@ -572,7 +572,7 @@
    			end
    		end
    	end	#PCIE5 WLAN card
-		device ref pcie_rp6 on
+		device ref pcie_rp7 on
    		chip drivers/net
    			register "wake" = "GPE0_DW1_04"
    			register "led_feature" = "0xe0"
@@ -582,10 +582,10 @@
    			register "add_acpi_dma_property" = "true"
    			device pci 00.0 on end
    		end
-			# Enable PCIE 6 using clk 6
-			register "pcie_rp[PCH_RP(6)]" = "{
-				.clk_src = 6,
-				.clk_req = 6,
+			# Enable PCIE 7 using clk 2
+			register "pcie_rp[PCH_RP(7)]" = "{
+				.clk_src = 2,
+				.clk_req = 2,
    			.flags = PCIE_RP_LTR | PCIE_RP_AER,
    		}"
    	end # RTL8125 Ethernet NIC