Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38541 )
Change subject: ec/google/chromeec: Add SSDT generator for ChromeOS EC ......................................................................
Patch Set 14:
(6 comments)
https://review.coreboot.org/c/coreboot/+/38541/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38541/3//COMMIT_MSG@9 PS3, Line 9: Newer versions of the Linux kernel would like to consume information
Not sure, it's in a maintainer's -next tree, I believe. I can check when it's expected to land.
Done
https://review.coreboot.org/c/coreboot/+/38541/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38541/11//COMMIT_MSG@9 PS11, Line 9: Upcoming versions of the Linux kernel
Oops, forgot that. I'm asking right now.
Done
https://review.coreboot.org/c/coreboot/+/38541/11/src/ec/google/chromeec/ec.... File src/ec/google/chromeec/ec.h:
https://review.coreboot.org/c/coreboot/+/38541/11/src/ec/google/chromeec/ec.... PS11, Line 342: board_get_usb_typec_port_paths
I hear you, I was trying to minimize the amount of manual work for new boards to implement this. […]
Done
https://review.coreboot.org/c/coreboot/+/38541/3/src/ec/google/chromeec/ec.c File src/ec/google/chromeec/ec.c:
https://review.coreboot.org/c/coreboot/+/38541/3/src/ec/google/chromeec/ec.c... PS3, Line 1631: LEFT
These are straight from power_manager, and apparently, according to the bug are supposed to all be u […]
Done
https://review.coreboot.org/c/coreboot/+/38541/11/src/ec/google/chromeec/ec_... File src/ec/google/chromeec/ec_chip.c:
https://review.coreboot.org/c/coreboot/+/38541/11/src/ec/google/chromeec/ec_... PS11, Line 15: SOC_INTEL_COMMON_BLOCK_XHCI
We should avoid intel specific references in common ec code. […]
Done
https://review.coreboot.org/c/coreboot/+/38541/11/src/ec/google/chromeec/ec_... PS11, Line 125: #if CONFIG(SOC_INTEL_COMMON_BLOCK_XHCI)
Ah, that sounds like a good idea. Then this can go in intel common XHCI block.
Done