[coreboot-gerrit] Change in coreboot[master]: soc/intel/xeon_sp: Early programming of ACPI bar

[Maxim Polyakov (Code Review)]

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41680 )

Change subject: soc/intel/xeon_sp: Early programming of ACPI bar
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Patch Set 4: Code-Review+2

(3 comments)

https://review.coreboot.org/c/coreboot/+/41680/3/src/soc/intel/xeon_sp/pch.c 
File src/soc/intel/xeon_sp/pch.c:

https://review.coreboot.org/c/coreboot/+/41680/3/src/soc/intel/xeon_sp/pch.c... 
PS3, Line 39: 0x3f
> #define PCR_DMI_ACPIBA_ADDR72MASK 0x3f

I meant that you use PCR_DMI_ACPIBA_ADDR72MASK (as define) instead of this magic 0x3f value.
But this is just a recommendation.

https://review.coreboot.org/c/coreboot/+/41680/3/src/soc/intel/xeon_sp/pch.c... 
PS3, Line 39: )
> unnecessary parentheses

Done

https://review.coreboot.org/c/coreboot/+/41680/3/src/soc/intel/xeon_sp/pch.c... 
PS3, Line 51: enable_rtc_upper_bank();
> I think it would be better to do this in a separate patch.

Ack