Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39674 )
Change subject: mb/google/deltaur: Add initial GPIO configuration ......................................................................
Patch Set 11:
(10 comments)
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... File src/mainboard/google/deltaur/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 25: PLTRST
Drallion's configuration PAD_CFG_GPI(GPP_H3, NONE, DEEP), /* CNVI_EN# */
Done
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 37: PAD_CFG_GPO(GPP_A13, 0, PLTRST),
Drallion's configuration PAD_CFG_GPO(GPP_H15, 1, DEEP), /* BT_RADIO_DIS# */
Done
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 53: PAD_CFG_GPO(GPP_A21, 1, PLTRST),
Drallion's configuration PAD_CFG_GPO(GPP_B11, 0, PLTRST), /* 3. […]
Done
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 95:
nit: missing )
Done
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 102: PAD_CFG_GPO(GPP_B21, 0, PLTRST),
Drallion's configuration PAD_CFG_GPO(GPP_B21, 0, DEEP), /* PCH_3. […]
Done
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 125: PAD_CFG_GPO(GPP_C8, 1, PLTRST),
Drallion's configuration PAD_CFG_GPO(GPP_C10, 1, DEEP), /* WWAN_FULL_PWR_EN */
Done
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 135: PLTRST
This may used for SSD D3 cold power sequence.. We can change it later on. […]
I'm starting to think the GPIO table is just wrong with all these resets... I'll go back over them all with a fine toothed comb.
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 192: PLTRST
Yes, need change to DEEP. […]
Done
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 201: NONE
Drallion's configuration PAD_CFG_GPI_APIC(GPP_C23, NONE, PLTRST, LEVEL, NONE), /* TS_INT# */ […]
It's definitely active-low, it's pulled up to 3.3V. Let's try invert for now.
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 219: PAD_CFG_GPO(GPP_E10, 1, PLTRST),
Drallion's configuration PAD_CFG_GPO(GPP_E16, 1, DEEP), /* HDMI_PD# */
Done