Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43401 )
Change subject: program layout: align to 64 bytes when Boot Guard is enabled
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Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43401/1/src/arch/x86/memlayout.ld
File src/arch/x86/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/43401/1/src/arch/x86/memlayout.ld@5...
PS1, Line 53: . = ALIGN(64);
These should be aligned for sure: bootblock, verstage and romstage
Well, you want the .text aligned to 64 bytes. The cache as ram variables just so happen to be below the text segment for intel devices w/ memory mapped spi. I'd suggest adding the correct alignment to the .text sections.
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