[coreboot-gerrit] [S] Change in coreboot[master]: soc/amd: Clarify ACPI _PRT entry generation

[Kyösti Mälkki (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held.

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74314 )

Change subject: soc/amd: Clarify ACPI _PRT entry generation
......................................................................

Patch Set 2:

(1 comment)

File src/soc/amd/common/block/pci/acpi_prt.c:

https://review.coreboot.org/c/coreboot/+/74314/comment/cfe364e5_66640f2b 
PS2, Line 10: /* GNB IO-APIC is located after the FCH IO-APIC */
> the existing comment works, but i'd reword this a bit; maybe something like: […]

In theory, it is the sum of all the previously listed IOAPICs' vector counts from the MADT. Far fetched, but in the specs IOAPICs do not need to be on-board devices, thus I don't want to assume the GNB immediately following the FCH.

So there is room for improvement here, GNB_GSI_BASE would become a gsi_base input parameter to this function, making it no longer GNB specific but something that we may be able to move under acpi/.

We currently completely lack IOAPIC device nodes, so revisit later?