Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38147 )
Change subject: soc/intel/tigerlake: Enable Audio on TGL
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Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38147/8/src/soc/intel/tigerlake/rom...
File src/soc/intel/tigerlake/romstage/fsp_params_tgl.c:
https://review.coreboot.org/c/coreboot/+/38147/8/src/soc/intel/tigerlake/rom...
PS8, Line 108: m_cfg->PchHdaAudioLinkDmicClkAPinMux[0] = GPIO_VER2_LP_MUXING_DMIC0_CLKA_GPP_S6;
: m_cfg->PchHdaAudioLinkDmicClkBPinMux[0] = GPIO_VER2_LP_MUXING_DMIC0_CLKB_GPP_S2;
: m_cfg->PchHdaAudioLinkDmicDataPinMux[0] = GPIO_VER2_LP_MUXING_DMIC0_DATA_GPP_S7;
: m_cfg->PchHdaAudioLinkDmicClkAPinMux[1] = GPIO_VER2_LP_MUXING_DMIC1_CLKA_GPP_S4;
: m_cfg->PchHdaAudioLinkDmicClkBPinMux[1] = GPIO_VER2_LP_MUXING_DMIC1_CLKB_GPP_S3;
: m_cfg->PchHdaAudioLinkDmicDataPinMux[1] = GPIO_VER2_LP_MUXING_DMIC1_DATA_GPP_S5;
Furquan, i tried the same experiment we did on volteer on tglrvp, I am not able to get the board boo […]
What is the issue that you are running into? Can you please raise a bug and start adding all the debug details there? It is difficult to understand what issues Intel is running into without knowing the details.
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