Máté Kukri has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81529?usp=email )
Change subject: mb/dell/optiplex_9020: Add missing HWM init sequence ......................................................................
mb/dell/optiplex_9020: Add missing HWM init sequence
This is hopefully enough to make fan control work.
Change-Id: Ibdccd3fc7364e03e84ca606592928410624eed43 Signed-off-by: Mate Kukri kukri.mate@gmail.com --- M src/mainboard/dell/optiplex_9020/bootblock.c 1 file changed, 33 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/81529/1
diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c index 2837cf9..34f3d86 100644 --- a/src/mainboard/dell/optiplex_9020/bootblock.c +++ b/src/mainboard/dell/optiplex_9020/bootblock.c @@ -90,6 +90,39 @@
for (size_t i = 0; i < ARRAY_SIZE(hwm_init_table); ++i) ec_write(1, hwm_init_table[i].addr, hwm_init_table[i].val); + + /* + * Missing HWM init, sniffed from LPC + */ + + static const struct ec_init_entry hwm_init_table2[] = { + {0x2db,0xc5}, {0x2d0,0x01}, {0x59e,0x4c}, {0x59f,0x18}, + {0x59f,0x80}, {0x5a2,0x4c}, {0x59e,0x00}, {0x048,0x00}, + {0x048,0x00}, {0x042,0x00}, {0x048,0x00}, {0x048,0x02}, + {0x048,0x00}, {0x048,0x02}, {0x042,0x00}, {0x048,0x00}, + {0x048,0x06}, {0x081,0x00}, {0x026,0x00}, {0x2fc,0x00}, + {0x2fc,0xa0}, {0x2fd,0x32}, {0x005,0x33}, {0x018,0x2f}, + {0x019,0x2f}, {0x01a,0x2f}, {0x080,0x00}, {0x081,0x00}, + {0x083,0xbb}, {0x085,0x98}, {0x086,0x3c}, {0x08a,0x39}, + {0x08b,0x44}, {0x090,0x61}, {0x091,0x6d}, {0x092,0x86}, + {0x096,0xa4}, {0x097,0xa4}, {0x098,0x9f}, {0x09b,0xa4}, + {0x0a0,0x0e}, {0x0a1,0x0e}, {0x0ae,0x7c}, {0x0af,0x7c}, + {0x0b0,0x9b}, {0x0b3,0x9a}, {0x0b6,0x08}, {0x0b7,0x08}, + {0x0ea,0x64}, {0x0ef,0xff}, {0x0f8,0x15}, {0x0f9,0x00}, + {0x0f0,0x30}, {0x0fd,0x01}, {0x1a1,0x00}, {0x1a2,0x00}, + {0x1b1,0x08}, {0x1be,0x9a}, {0x280,0x94}, {0x281,0x11}, + {0x282,0x03}, {0x283,0x0a}, {0x284,0x80}, {0x285,0x03}, + {0x288,0x94}, {0x289,0x11}, {0x28a,0x03}, {0x28b,0x0a}, + {0x28c,0x80}, {0x28d,0x03}, {0x09e,0x30}, {0x0ea,0x00}, + {0x0eb,0x64}, {0x2fc,0x00}, {0x0b8,0x00}, {0x02c,0x00}, + {0x02d,0x00}, {0x02e,0x00}, {0x02f,0x00}, {0x049,0x00}, + {0x049,0x00}, {0x059,0x6a}, {0x041,0x00}, {0x041,0x10}, + {0x049,0x00}, {0x049,0x04}, {0x07b,0x0e}, {0x07c,0x0e}, + {0x07a,0x01}, + }; + + for (size_t i = 0; i < ARRAY_SIZE(hwm_init_table2); ++i) + ec_write(1, hwm_init_table2[i].addr, hwm_init_table2[i].val); }
#define SCH555x_IOBASE 0x2e