Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38461 )
Change subject: soc/intel/tigerlake: Update fsp params for Jasper Lake. ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38461/3/src/soc/intel/tigerlake/fsp... File src/soc/intel/tigerlake/fsp_params_jsl.c:
https://review.coreboot.org/c/coreboot/+/38461/3/src/soc/intel/tigerlake/fsp... PS3, Line 86: /* Set USB OC pin to 0 first */ : for (i = 0; i < ARRAY_SIZE(params->Usb2OverCurrentPin); i++) : params->Usb2OverCurrentPin[i] = 0; : : for (i = 0; i < ARRAY_SIZE(params->Usb3OverCurrentPin); i++) : params->Usb3OverCurrentPin[i] = 0; : not needed?
https://review.coreboot.org/c/coreboot/+/38461/3/src/soc/intel/tigerlake/fsp... PS3, Line 101: /* Override/Fill Fsp Silicon Param for mainboard */ : mainboard_silicon_init_params(params); can we move this to end after local assignments
https://review.coreboot.org/c/coreboot/+/38461/3/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params_jsl.c:
https://review.coreboot.org/c/coreboot/+/38461/3/src/soc/intel/tigerlake/rom... PS3, Line 99: soc_memory_init_params(m_cfg, config); move at end after local assignments?