10 Sep
2018
10 Sep
'18
9:25 p.m.
Xiang Wang has posted comments on this change. ( https://review.coreboot.org/28551 )
Change subject: soc/sifive/fu540: Makefile: include mtime_init in ramstage ......................................................................
Patch Set 5: Code-Review+1
@Xiang This fixes a compilation issue that appeared due to your 2 CR that have been merged. Does my fix look ok to you?
Yes, This is OK! Thank you!
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I7c7768744a165b97978bb8f7f95acf7b32ca4aa4
Gerrit-Change-Number: 28551
Gerrit-PatchSet: 5
Gerrit-Owner: Philipp Hug philipp@hug.cx
Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com
Gerrit-Reviewer: Philipp Hug philipp@hug.cx
Gerrit-Reviewer: Xiang Wang wxjstz@126.com
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Gerrit-Comment-Date: Tue, 11 Sep 2018 00:25:40 +0000
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