Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/26704
Change subject: arch/x86: Set the SIPI vector to a lower address ......................................................................
arch/x86: Set the SIPI vector to a lower address
This allows for ROMCC_bootblocks that are larger than 4KiB.
Change-Id: I75a5e515bf5e7d0b8a496a882d20fe02cc30c253 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/x86/failover.ld M src/cpu/Kconfig 2 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/26704/1
diff --git a/src/arch/x86/failover.ld b/src/arch/x86/failover.ld index e9613d9..2f844ad 100644 --- a/src/arch/x86/failover.ld +++ b/src/arch/x86/failover.ld @@ -28,7 +28,7 @@ * boundary anyway, so no pad byte appears between _rom and _start. */ .bogus ROMLOC_MIN : { - . = CONFIG_SIPI_VECTOR_IN_ROM ? ALIGN(4096) : ALIGN(4); + . = CONFIG_SIPI_VECTOR_IN_ROM ? ALIGN(8192) : ALIGN(4); ROMLOC = .; } >rom = 0xff
@@ -51,7 +51,7 @@ * address gets applied. */ ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16) - - (CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0); + (CONFIG_SIPI_VECTOR_IN_ROM ? 8192 : 0);
/* Post-check proper SIPI vector. */ _bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || ((ap_sipi_vector & 0x0fff) == 0x0), diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index e10a702..affa18c 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -44,7 +44,7 @@
config AP_SIPI_VECTOR hex - default 0xfffff000 + default 0xffffe000 help This must equal address of ap_sipi_vector from bootblock build.