Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35306
to look at the new patch set (#3).
Change subject: soc/intel/cannonlake: Add config for sata devslp pad reset configuration ......................................................................
soc/intel/cannonlake: Add config for sata devslp pad reset configuration
CML FSP now provides a provision to configure the SATA devslp GPIO pad reset configuration. This config would help set the the required pad reset configuration.
Change-Id: I4eaea9c6da67f1274ad3e392046a68cddc1b99b6 Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/fsp_params.c 2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/35306/3