[coreboot-gerrit] [XS] Change in coreboot[main]: soc/amd/cezanne: Give PSP verstage 4K more space

[Yu-Ping Wu (Code Review)]

Yu-Ping Wu has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/83564?usp=email )

Change subject: soc/amd/cezanne: Give PSP verstage 4K more space
......................................................................

Patch Set 2:

(1 comment)

File src/soc/amd/cezanne/include/soc/psp_verstage_addr.h:

https://review.coreboot.org/c/coreboot/+/83564/comment/402b9251_6e38aa75?usp... :
PS2, Line 20: #define PSP_VERSTAGE_STACK_START	0x42000
            : #define PSP_VERSTAGE_STACK_SIZE		(36K)
> The stack size and start address is a contract between PSP Bootloader and Verstage. […]

Thanks.

I don't think ARM verstage should be built with clang, which seems to be a mistake. Uploaded CB:83594.