[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint: Consider root ports being disabled by strap

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44155 )

Change subject: sb/intel/lynxpoint: Consider root ports being disabled by strap
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44155/2/src/southbridge/intel/lynxp... 
File src/southbridge/intel/lynxpoint/pcie.c:

https://review.coreboot.org/c/coreboot/+/44155/2/src/southbridge/intel/lynxp... 
PS2, Line 108:  * +-----+----+----+----+----+
             : 	 * | RPC | #5 | #6 | #7 | #8 |
             : 	 * +-----+----+----+----+----+
             : 	 * |  0  | x1 | x1 | x1 | x1 |
             : 	 * |  1  | x2 |    | x1 | x1 |
             : 	 * |  2  | x2 |    | x2 |    |
             : 	 * |  3  | x4 |    |    |    |
             : 	 * +-----+----+----+----+----+
> Are you by chance referring to this part of the datasheet? https://imgur.com/QrElUnO.png
>
> It mentions both ports 1-4 and ports 5-8, it's just clumped together though.

No PECR4 (0xfc) bits 14-15.