Matt DeVillier (matt.devillier@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10232
-gerrit
commit eea1b04e76442684a522ca20d0b25fd0471d4790 Author: Matt DeVillier matt.devillier@gmail.com Date: Sat May 16 21:51:17 2015 -0500
superio/nuvoton: Add support for Nuvoton NCT6779D
Add support for Nuvoton NCT6779D, using NCT6776 as a baseline
Change-Id: I020a21267f7e30bdea4bb5f83d67bd94082fdf05 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- src/superio/nuvoton/Kconfig | 3 ++ src/superio/nuvoton/Makefile.inc | 1 + src/superio/nuvoton/nct6779d/Makefile.inc | 21 ++++++++ src/superio/nuvoton/nct6779d/nct6779d.h | 56 +++++++++++++++++++ src/superio/nuvoton/nct6779d/superio.c | 89 +++++++++++++++++++++++++++++++ 5 files changed, 170 insertions(+)
diff --git a/src/superio/nuvoton/Kconfig b/src/superio/nuvoton/Kconfig index dd387a1..13de1b1 100644 --- a/src/superio/nuvoton/Kconfig +++ b/src/superio/nuvoton/Kconfig @@ -36,3 +36,6 @@ config SUPERIO_NUVOTON_NCT5572D config SUPERIO_NUVOTON_NCT6776 bool select SUPERIO_NUVOTON_COMMON_ROMSTAGE +config SUPERIO_NUVOTON_NCT6779D + bool + select SUPERIO_NUVOTON_COMMON_ROMSTAGE diff --git a/src/superio/nuvoton/Makefile.inc b/src/superio/nuvoton/Makefile.inc index 5e4727f..856f604 100644 --- a/src/superio/nuvoton/Makefile.inc +++ b/src/superio/nuvoton/Makefile.inc @@ -24,3 +24,4 @@ subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450 subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5572D) += nct5572d subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6776) += nct6776 +subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += nct6779d diff --git a/src/superio/nuvoton/nct6779d/Makefile.inc b/src/superio/nuvoton/nct6779d/Makefile.inc new file mode 100644 index 0000000..ef74154 --- /dev/null +++ b/src/superio/nuvoton/nct6779d/Makefile.inc @@ -0,0 +1,21 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2015 Matt DeVillier matt.devillier@gmail.com +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += superio.c diff --git a/src/superio/nuvoton/nct6779d/nct6779d.h b/src/superio/nuvoton/nct6779d/nct6779d.h new file mode 100644 index 0000000..f3fb6ea --- /dev/null +++ b/src/superio/nuvoton/nct6779d/nct6779d.h @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Matt DeVillier matt.devillier@gmail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_NUVOTON_NCT6779D_H +#define SUPERIO_NUVOTON_NCT6779D_H + +/* Logical Device Numbers (LDN). */ +#define NCT6779D_PP 0x01 /* Parallel port */ +#define NCT6779D_SP1 0x02 /* Com1 */ +#define NCT6779D_SP2 0x03 /* Com2 & IR */ +#define NCT6779D_KBC 0x05 /* PS/2 keyboard and mouse */ +#define NCT6779D_CIR 0x06 /* Consumer IR */ +#define NCT6779D_GPIO678_V 0x07 /* GPIO 6/7/8 */ +#define NCT6779D_WDT1_GPIO01_V 0x08 /* WDT1, GPIO 0/1 */ +#define NCT6779D_GPIO12345678_V 0x09 /* GPIO 1/2/3/4/5/6/7/8 */ +#define NCT6779D_ACPI 0x0A /* ACPI */ +#define NCT6779D_HWM_FPLED 0x0B /* Hardware monitor & front LED */ +#define NCT6779D_WDT1 0x0D /* Watchdog timer 1 */ +#define NCT6779D_CIRWKUP 0x0E /* CIR wakeup */ +#define NCT6779D_GPIO_PP_OD 0x0F /* GPIO Push-Pull/Open drain select */ +#define NCT6779D_PRT80 0x14 /* Port 80 UART */ +#define NCT6779D_DSLP 0x16 /* Deep sleep */ + + +/* virtual LDN for GPIO */ + +#define NCT6779D_GPIOBASE ((0 << 8) | NCT6779D_WDT1_GPIO01_V) + +#define NCT6779D_GPIO0 ((1 << 8) | NCT6779D_WDT1_GPIO01_V) +#define NCT6779D_GPIO1 ((1 << 8) | NCT6779D_GPIO12345678_V) +#define NCT6779D_GPIO2 ((2 << 8) | NCT6779D_GPIO12345678_V) +#define NCT6779D_GPIO3 ((3 << 8) | NCT6779D_GPIO12345678_V) +#define NCT6779D_GPIO4 ((4 << 8) | NCT6779D_GPIO12345678_V) +#define NCT6779D_GPIO5 ((5 << 8) | NCT6779D_GPIO12345678_V) +#define NCT6779D_GPIO6 ((6 << 8) | NCT6779D_GPIO12345678_V) +#define NCT6779D_GPIO7 ((7 << 8) | NCT6779D_GPIO12345678_V) +#define NCT6779D_GPIO8 ((0 << 8) | NCT6779D_GPIO12345678_V) + +#endif /* SUPERIO_NUVOTON_NCT6779D_H */ diff --git a/src/superio/nuvoton/nct6779d/superio.c b/src/superio/nuvoton/nct6779d/superio.c new file mode 100644 index 0000000..701f8c7 --- /dev/null +++ b/src/superio/nuvoton/nct6779d/superio.c @@ -0,0 +1,89 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * Copyright (C) 2014 Felix Held felix-coreboot@felixheld.de + * Copyright (C) 2014 Edward O'Callaghan eocallaghan@alterapraxis.com + * Copyright (C) 2015 Matt DeVillier matt.devillier@gmail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <device/device.h> +#include <device/pnp.h> +#include <pc80/keyboard.h> +#include <stdlib.h> +#include <superio/conf_mode.h> + +#include "nct6779d.h" + + +static void nct6779d_init(struct device *dev) +{ + if (!dev->enabled) + return; + + switch(dev->path.pnp.device) { + /* TODO: Might potentially need code for HWM or FDC etc. */ + case NCT6779D_KBC: + pc_keyboard_init(); + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_alt_enable, + .init = nct6779d_init, + .ops_pnp_mode = &pnp_conf_mode_8787_aa, +}; + +static struct pnp_info pnp_dev_info[] = { + { &ops, NCT6779D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, }, + { &ops, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, + { &ops, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, + { &ops, NCT6779D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x0fff, 0}, {0x0fff, 4}, }, + { &ops, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, + { &ops, NCT6779D_ACPI}, + { &ops, NCT6779D_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x0ffe, 0}, {0x0ffe, 4}, }, + { &ops, NCT6779D_WDT1}, + { &ops, NCT6779D_CIRWKUP, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, + { &ops, NCT6779D_GPIO_PP_OD}, + { &ops, NCT6779D_PRT80}, + { &ops, NCT6779D_DSLP}, + { &ops, NCT6779D_GPIOBASE, PNP_IO0, {0x0ff8, 0}, }, + { &ops, NCT6779D_GPIO0}, + { &ops, NCT6779D_GPIO1}, + { &ops, NCT6779D_GPIO2}, + { &ops, NCT6779D_GPIO3}, + { &ops, NCT6779D_GPIO4}, + { &ops, NCT6779D_GPIO5}, + { &ops, NCT6779D_GPIO6}, + { &ops, NCT6779D_GPIO7}, + { &ops, NCT6779D_GPIO8}, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations superio_nuvoton_nct6779d_ops = { + CHIP_NAME("NUVOTON NCT6779D Super I/O") + .enable_dev = enable_dev, +};