[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/alderlake: Change the maximum C state to C8

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84622?usp=email )

(

6 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/intel/alderlake: Change the maximum C state to C8
......................................................................

soc/intel/alderlake: Change the maximum C state to C8

Change the maximum C state allowed when S0ix isn't used to C8
from C7S to solve the following error:
    MWAIT C-state 0x33 not supported by HW (0x1010)

This is a result of copy-pasta from older SOCs, as C7 is not
supported on Alder Lake.

Tested on `starbook_adl` with Ubuntu 24.04 by booting, and
performing multiple S3 cycles.

Change-Id: Idb3e4d34361c8ac25ef144c0d1cda9f801ed0c54
Signed-off-by: Sean Rhodes 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84622
Reviewed-by: Kapil Porwal 
Reviewed-by: Jérémy Compostella 
Tested-by: build bot (Jenkins) 
Reviewed-by: Paul Menzel 
---
M src/soc/intel/alderlake/acpi.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Jérémy Compostella: Looks good to me, approved
  Paul Menzel: Looks good to me, but someone else must approve
  Kapil Porwal: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c
index ba3a5bc..463112f 100644
--- a/src/soc/intel/alderlake/acpi.c
+++ b/src/soc/intel/alderlake/acpi.c
@@ -104,7 +104,7 @@
 static int cstate_set_non_s0ix[] = {
    C_STATE_C1,
    C_STATE_C6_LONG_LAT,
-	C_STATE_C7S_LONG_LAT
+	C_STATE_C8
 };

static int cstate_set_s0ix[] = {