Varun Joshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39865 )
Change subject: soc/intel/tigerlake: Reorganize memory initialization support
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Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39865/7/src/soc/intel/tigerlake/inc...
File src/soc/intel/tigerlake/include/soc/meminit_tgl.h:
https://review.coreboot.org/c/coreboot/+/39865/7/src/soc/intel/tigerlake/inc...
PS7, Line 65: 2
2 DQS - 1pair,per channel, right?
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Gerrit-Project: coreboot
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