[coreboot-gerrit] [S] Change in coreboot[master]: soc/amd/mendocino: update FSP parameters for eDP power sequence adjus...

[Chris Wang (Code Review)]

Attention is currently required from: Raul Rangel, Chris Wang, Fred Reitberger, Felix Held.

Hello Jason Glenesk, build bot (Jenkins), Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/74789

to look at the new patch set (#2).

Change subject: soc/amd/mendocino: update FSP parameters for eDP power sequence adjustment
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soc/amd/mendocino: update FSP parameters for eDP power sequence adjustment

Add UPD parameter for eDP power sequence adjustment.

The edp_panel_t9_ms parameter is set for bloff to varybloff.

BUG=b:271704149
TEST=Build; Verify the UPD was pass to system integrated table.

Signed-off-by: Chris Wang 
Change-Id: Id651c9cc4d6f4e27f6c78ca10ca12936d66ef43b
---
M src/soc/amd/mendocino/chip.h
M src/soc/amd/mendocino/fsp_m_params.c
2 files changed, 20 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/74789/2