Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5477
-gerrit
commit 7f785a57b593ff16d9479bbd5d144a19d710d157 Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Tue Apr 8 23:24:17 2014 +1000
superio/ite/it8712f: Make CLKIN prescale a argument
Having a argument to a general function instead of a hardcoded function for setting the clockin prescale is slightly more flexable.
Change-Id: I2dd7e0c4937bc913313c151daca237d6d1b980e1 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/asus/a8n_e/romstage.c | 2 +- src/mainboard/asus/m2v/romstage.c | 2 +- src/mainboard/ecs/p6iwp-fe/romstage.c | 2 +- src/superio/ite/it8712f/early_serial.c | 7 ++++--- src/superio/ite/it8712f/it8712f.h | 6 +++++- 5 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c index a1e6590..9ccf384 100644 --- a/src/mainboard/asus/a8n_e/romstage.c +++ b/src/mainboard/asus/a8n_e/romstage.c @@ -104,7 +104,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx);
- it8712f_24mhz_clkin(CLKIN_DEV); + it8712f_configure_uart_clk(CLKIN_DEV, IT8712F_UART_CLK_PREDIVIDE_24); it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init();
diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c index 6ba8307..449faa1 100644 --- a/src/mainboard/asus/m2v/romstage.c +++ b/src/mainboard/asus/m2v/romstage.c @@ -253,7 +253,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset = 0; struct sys_info *sysinfo = &sysinfo_car;
- it8712f_24mhz_clkin(CLKIN_DEV); + it8712f_configure_uart_clk(CLKIN_DEV, IT8712F_UART_CLK_PREDIVIDE_24); it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); it8712f_kill_watchdog(WATCHDOG_DEV); console_init(); diff --git a/src/mainboard/ecs/p6iwp-fe/romstage.c b/src/mainboard/ecs/p6iwp-fe/romstage.c index 8f5626d..ba17c15 100644 --- a/src/mainboard/ecs/p6iwp-fe/romstage.c +++ b/src/mainboard/ecs/p6iwp-fe/romstage.c @@ -38,7 +38,7 @@
void main(unsigned long bist) { - it8712f_24mhz_clkin(CLKIN_DEV); + it8712f_configure_uart_clk(CLKIN_DEV, IT8712F_UART_CLK_PREDIVIDE_24); it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); report_bist_failure(bist); diff --git a/src/superio/ite/it8712f/early_serial.c b/src/superio/ite/it8712f/early_serial.c index 7a7a4b2..2a46235 100644 --- a/src/superio/ite/it8712f/early_serial.c +++ b/src/superio/ite/it8712f/early_serial.c @@ -47,17 +47,18 @@ static void pnp_exit_conf_state(device_t dev) pnp_write_config(dev, IT8712F_CONFIG_REG_CC, 0x02); }
-/* Select 24MHz CLKIN (48MHz is the default). */ /* * in romstage.c * #define CLKIN_DEV PNP_DEV(0x2e, IT8712F_GPIO) * and pass: CLKIN_DEV + * IT8712F_UART_CLK_PREDIVIDE_24 + * IT8712F_UART_CLK_PREDIVIDE_48 (default) */ -void it8712f_24mhz_clkin(device_t dev) +void it8712f_configure_uart_clk(device_t dev, u8 predivide) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - pnp_write_config(dev, IT8712F_CONFIG_REG_CLOCKSEL, 0x01); + pnp_write_config(dev, IT8712F_CONFIG_REG_CLOCKSEL, (predivide << 2) | 1); pnp_exit_conf_state(dev); }
diff --git a/src/superio/ite/it8712f/it8712f.h b/src/superio/ite/it8712f/it8712f.h index 06d409d..3cddfd1 100644 --- a/src/superio/ite/it8712f/it8712f.h +++ b/src/superio/ite/it8712f/it8712f.h @@ -35,9 +35,13 @@ #define IT8712F_GAME 0x09 /* GAME port */ #define IT8712F_IR 0x0a /* Consumer IR */
+/* bit 0 in index 0x23 sets CLKIN Frequency */ +#define IT8712F_UART_CLK_PREDIVIDE_48 0x00 /* default */ +#define IT8712F_UART_CLK_PREDIVIDE_24 0x01 + void it8712f_kill_watchdog(device_t); void it8712f_enable_serial(device_t dev, u16 iobase); -void it8712f_24mhz_clkin(device_t); +void it8712f_configure_uart_clk(device_t, u8); void it8712f_enable_3vsbsw(device_t);
#endif /* SUPERIO_ITE_IT8712F_IT8712F_H */