Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85601?usp=email )
Change subject: mb/trulo/var/uldrenite: Set GPP_B5 and B6 to ISH function ......................................................................
mb/trulo/var/uldrenite: Set GPP_B5 and B6 to ISH function
According to the discussion on the issue tracker, set GPP_B5 and GPP_B6 to the ISH function.
BUG=b:383696667 TEST=emerge-nissa coreboot
Change-Id: I0c98206edd89c90cb1c341a8f713f09f4b8bf0e7 Signed-off-by: John Su john_su@compal.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/85601 Reviewed-by: Kapil Porwal kapilporwal@google.com Reviewed-by: Subrata Banik subratabanik@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Eric Lai ericllai@google.com Reviewed-by: Dtrain Hsu dtrain_hsu@compal.corp-partner.google.com --- M src/mainboard/google/brya/variants/uldrenite/gpio.c 1 file changed, 4 insertions(+), 4 deletions(-)
Approvals: Subrata Banik: Looks good to me, approved Kapil Porwal: Looks good to me, but someone else must approve build bot (Jenkins): Verified Eric Lai: Looks good to me, approved Dtrain Hsu: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/uldrenite/gpio.c b/src/mainboard/google/brya/variants/uldrenite/gpio.c index ddb7b08..cdae233 100644 --- a/src/mainboard/google/brya/variants/uldrenite/gpio.c +++ b/src/mainboard/google/brya/variants/uldrenite/gpio.c @@ -61,10 +61,10 @@ PAD_CFG_GPI_IRQ_WAKE(GPP_B3, NONE, PWROK, LEVEL, INVERT), /* B4 : PROC_GP3 ==> EN_PP3300_UCAM_X */ PAD_CFG_GPO_LOCK(GPP_B4, 1, LOCK_CONFIG), - /* B5 : GPP_B5 ==> NC */ - PAD_NC(GPP_B5, NONE), - /* B6 : GPP_B6 ==> NC */ - PAD_NC(GPP_B6, NONE), + /* B5 : GPP_B5 ==> ISH_I2C0_SCL */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_B5, NONE, DEEP, NF1), + /* B6 : GPP_B6 ==> ISH_I2C0_SDA */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_B6, NONE, DEEP, NF1), /* B7 : GPP_B7 ==> NC */ PAD_NC_LOCK(GPP_B7, NONE, LOCK_CONFIG), /* B8 : GPP_B8 ==> NC */