[coreboot-gerrit] Change in ...coreboot[master]: sb/intel/bd828x6x: Make CONFIG_ELOG=y compile

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30426

Change subject: sb/intel/bd828x6x: Make CONFIG_ELOG=y compile
......................................................................

sb/intel/bd828x6x: Make CONFIG_ELOG=y compile

The function pch_log_state() was overlooked when making the smi
relocation code common.

Change-Id: I878772f1a93105b828e50f37e105d04988ba0bdf
Signed-off-by: Arthur Heymans 
---
M src/southbridge/intel/bd82x6x/elog.c
M src/southbridge/intel/bd82x6x/pch.h
M src/southbridge/intel/common/pmutil.h
M src/southbridge/intel/common/smi.c
4 files changed, 5 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/30426/1

diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c
index 3299d4b..2ccdf83 100644
--- a/src/southbridge/intel/bd82x6x/elog.c
+++ b/src/southbridge/intel/bd82x6x/elog.c
@@ -21,6 +21,7 @@
 #include <stdint.h>
 #include <string.h>
 #include <elog.h>
+#include <southbridge/intel/common/pmutil.h>
 #include "pch.h"

void pch_log_state(void)
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 280ac7d..ff55c39 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -66,9 +66,6 @@
 int pch_silicon_type(void);
 int pch_silicon_supported(int type, int rev);
 void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
-#if IS_ENABLED(CONFIG_ELOG)
-void pch_log_state(void);
-#endif
 #else /* __PRE_RAM__ */
 void enable_smbus(void);
 void enable_usb_bar(void);
diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h
index 47813f7..2076a3d 100644
--- a/src/southbridge/intel/common/pmutil.h
+++ b/src/southbridge/intel/common/pmutil.h
@@ -149,5 +149,6 @@
 void southbridge_finalize_all(void);
 void southbridge_smi_monitor(void);
 em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd);
+void pch_log_state(void);

#endif /*INTEL_COMMON_PMUTIL_H */
diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c
index 3ce4f40..af9dd5d 100644
--- a/src/southbridge/intel/common/smi.c
+++ b/src/southbridge/intel/common/smi.c
@@ -23,6 +23,7 @@
 #include <cpu/x86/smm.h>
 #include <cpu/intel/smm/gen1/smi.h>
 #include <southbridge/intel/common/pmbase.h>
+#include <southbridge/intel/common/pmutil.h>

#include "pmutil.h"

@@ -39,10 +40,9 @@
    u16 pm1_en;
    u32 gpe0_en;

-#if IS_ENABLED(CONFIG_ELOG)
+	if (IS_ENABLED(CONFIG_ELOG))
    /* Log events from chipset before clearing */
-	pch_log_state();
-#endif
+		pch_log_state();

printk(BIOS_DEBUG, "Initializing southbridge SMI...");