build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33328 )
Change subject: src/mainboards/asus: Add support for P8Z77-M PRO mainboard ......................................................................
Patch Set 4:
(38 comments)
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/acpi_... File src/mainboard/asus/p8z77-m_pro/acpi_tables.c:
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/acpi_... PS4, Line 49: } adding a line without newline at end of file
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... File src/mainboard/asus/p8z77-m_pro/romstage.c:
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 98: * The "&0xff" is cuz some systems may define CHAR_SIZE=9, so need a mask line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 101: * It's needed to include "#include <drivers/pc80/pc/ps2_controller.asl>" line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 109: pnp_set_iobase(KBC_DEV, 0x60u, 0x0060u); /* KBC1 IO base address (KBD) */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 110: pnp_set_iobase(KBC_DEV, 0x62u, 0x0064u); /* KBC2 IO base address (AUX) */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 114: /* KB 12Mhz + Disable Port 92 + Gate A20 hw speedup + soft KBRST */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 115: /* Defval=0x83(KBRST by hw instead of sw). Asus Bios 2203 has 0x82 */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 119: * See section "21.10 Configuration Register -> Logical Device A (ACPI)", line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 135: switch (powerOnAfterFail) { switch and case should be at the same indent
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 163: acpiDelay |= (uint8_t)0x10u; /* Bit 4: Use 0.5s delay, OR mask 10000b=0x10 */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 171: void mainboard_get_spd(spd_raw_data *spd, bool id_only) open brace '{' following function definitions go on the next line
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 180: int mainboard_should_reset_usb(int s3resume) open brace '{' following function definitions go on the next line
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 185: void mainboard_fill_pei_data(struct pei_data *pei_data) open brace '{' following function definitions go on the next line
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 188: { that open brace { should be on the previous line
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 227: /* copyed mainboard_usb_ports array above & added cable len: line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 228: * {enabled, oc_pin, cable len 0x0080=<8inches/20cm} line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 230: { 1, 0, 0x0080 }, /* USB3 front internal header */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 231: { 1, 0, 0x0080 }, /* USB3 front internal header */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 233: { 1, 1, 0x0080 }, /* USB3 ETH botton connector */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 235: { 1, 2, 0x0080 }, /* USB2 PS2 botton connector */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 236: { 0, 3, 0x0080 }, /* USB2 internal header (USB1112 on board) */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 237: { 0, 3, 0x0080 }, /* USB2 internal header (USB1112 on board) */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 238: { 0, 4, 0x0080 }, /* USB2 internal header (USB910 on board) */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 239: { 0, 4, 0x0080 }, /* USB2 internal header (USB910 on board) */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 240: { 0, 6, 0x0080 }, /* USB2 internal header (USB78 on board) */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 241: { 0, 5, 0x0080 }, /* USB2 internal header (USB78 on board) */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 248: * 3=Smart Auto(like #2 but keep speed on reboot) line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 251: /* 4 bit switch mask. 0=not switchable, 1=switchable; line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 252: * Means once it's loaded the OS, it can swap ports line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 256: 1, /* 0=No xHCI preOS driver; 1=xHCI preOS driver */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 257: /* 0=Don't use xHCI streams (less speed,more compatibility) line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 258: * 1=use xHCI streams for better speed (and less compatibility) line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 262: /* ASUS P8Z77-M Pro supports 1.35v DIMMs according to the manual */ line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 264: /* PCIe 3.0 support. As we use Ivy Bridge, let's enable this... line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 269: * Better leave it always at Auto for compatibility & stability. line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 282: * 2 = Auto: work as USB2.0(ehci) until OS loads USB3 xhci driver line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 283: * 3 = Smart Auto : same than Auto, but if OS loads USB3 driver and line over 80 characters
https://review.coreboot.org/#/c/33328/4/src/mainboard/asus/p8z77-m_pro/romst... PS4, Line 303: #endif /* CONFIG(USE_NATIVE_RAMINIT) */ adding a line without newline at end of file