Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33228
to look at the new patch set (#3).
Change subject: [NOTFORMERGE_YET]3rdparty/blobs: Update submodulue, SNB improvements ......................................................................
[NOTFORMERGE_YET]3rdparty/blobs: Update submodulue, SNB improvements
The sandybridge DACHE_RAM_BASE is relocated and allows for more flexible location of the stack.
The sandybridge systemagent-r6 blob is modified: - To be more flexible about the location of the stack wrt the heap - Place the MRC pool right below the MRC_VAR region - to work with the same DCACHE_RAM_BASE from the native raminit (could make the CAR linker symbols easily compatible if desired)
This allows CAR setup compatibility between mrc.bin and native bootpath and also allows for BIOS/memory mappeds region larger than 8MB.
This changes the semantics of CONFIG_DACHE_RAM_MRC_VAR_SIZE to also include the pool on top of MRC_VAR region.
TODO: update when blobs repo master is updated.
TESTED on T520 (boots and resumes from S3 with mrc.bin).
Change-Id: I17d240656575b69a24718d90e4f2d2b7339d05a7 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M 3rdparty/blobs M src/arch/x86/car.ld M src/northbridge/intel/sandybridge/Kconfig M src/northbridge/intel/sandybridge/raminit_mrc.c 4 files changed, 30 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/33228/3