[coreboot-gerrit] Change in coreboot[master]: mv/google/kahlee/variants/baseboard/gpio.c: Reset I2C slaves

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/28575

Change subject: mv/google/kahlee/variants/baseboard/gpio.c: Reset I2C slaves
......................................................................

mv/google/kahlee/variants/baseboard/gpio.c: Reset I2C slaves

Use the new I2C slave reset function and reset all slaves connected to all
4 I2C.

BUG=b:114479395
TEST=Added debug code. Build and boot grunt. Examined output, confirmed
GPIO pins changing as required. Removed debug code.

Change-Id: Ia78ee5d5319d3c1a7daa9c56c81d435999b3a359
Signed-off-by: Richard Spiegel 
---
M src/mainboard/google/kahlee/mainboard.c
M src/mainboard/google/kahlee/variants/baseboard/gpio.c
M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
3 files changed, 24 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/28575/1

diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c
index 2540bcd..c2e0f68 100644
--- a/src/mainboard/google/kahlee/mainboard.c
+++ b/src/mainboard/google/kahlee/mainboard.c
@@ -31,6 +31,7 @@
 #include <variant/ec.h>
 #include <variant/thermal.h>
 #include <vendorcode/google/chromeos/chromeos.h>
+#include <gpio.h>

/***********************************************************
  * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.
@@ -123,6 +124,7 @@

printk(BIOS_INFO, "Board ID: %d\n", boardid);

+	variant_reset_i2c_devices();
    mainboard_ec_init();

gpios = variant_gpio_table(&num_gpios);
diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c
index 75a8ab5..0b77e8f 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c
@@ -62,9 +62,8 @@
    /* GPIO_74 - LPC_CLK0_EC_R */
    PAD_NF(GPIO_74, LPCCLK0, PULL_DOWN),

-	/* GPIO_76 - EN_PP3300_TOUCHSCREEN */
-	/* Init low to reset the chip */
-	PAD_GPO(GPIO_76, LOW),
+	/* GPIO_85 - TOUCHSCREEN_RST (Active High) */
+	PAD_GPO(GPIO_85, LOW),

/* GPIO_92 - WLAN_PCIE_CLKREQ_3V3_ODL */
    PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP),
@@ -164,9 +163,6 @@
    /* GPIO_84 - HUB_RST (Active High) */
    PAD_GPO(GPIO_84, LOW),

-	/* GPIO_85 - TOUCHSCREEN_RST (Active High) */
-	PAD_GPO(GPIO_85, LOW),
-
    /* GPIO_86 - Unused (TP109) */
    PAD_GPI(GPIO_86, PULL_UP),

@@ -252,6 +248,20 @@
    PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE),
 };

+struct soc_amd_force_toggle i2c_pins[] = {
+	/* GPIO_85 - TOUCHSCREEN_RST (Active High) */
+	PAD_RESET_DEVICE(GPIO_85),
+
+	/* GPIO_113 - APU_I2C_SCL2 (Pen & Trackpad) */
+	PAD_RESET_I2C_SLAVE(GPIO_113),
+
+	/* GPIO_145 - PCH_I2C_AUDIO_SCL */
+	PAD_RESET_I2C_SLAVE(GPIO_145),
+
+	/* GPIO_147 - PCH_I2C_H1_TPM_SCL */
+	PAD_RESET_I2C_SLAVE(GPIO_147),
+};
+
 const __weak
 struct soc_amd_gpio *variant_early_gpio_table(size_t *size)
 {
@@ -266,6 +276,11 @@
    return gpio_set_stage_ram;
 }

+__weak void variant_reset_i2c_devices(void)
+{
+	sb_reset_i2c_slaves(i2c_pins, ARRAY_SIZE(i2c_pins));
+}
+
 /*
  * This function is still needed for boards that sets gevents above 23
  * that will generate SCI or SMI, such as kahlee. Normally this function
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
index 6e89105..cc73d3e 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
@@ -30,6 +30,7 @@
 const struct soc_amd_gpio *variant_early_gpio_table(size_t *size);
 const struct soc_amd_gpio *variant_gpio_table(size_t *size);
 void variant_romstage_entry(int s3_resume);
+void variant_reset_i2c_devices(void);
 #if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
 void variant_mainboard_suspend_resume(void);
 #endif