[coreboot-gerrit] Change in coreboot[master]: drivers/pc80/rtc: Clean up some inlined functions

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38179 )

Change subject: drivers/pc80/rtc: Clean up some inlined functions
......................................................................

drivers/pc80/rtc: Clean up some inlined functions

Change-Id: Ie73797b4e9a09605a0685f0b03cb85e9a3be93ad
Signed-off-by: Kyösti Mälkki 
---
M src/drivers/pc80/rtc/mc146818rtc.c
M src/drivers/pc80/rtc/mc146818rtc_boot.c
M src/include/pc80/mc146818rtc.h
3 files changed, 42 insertions(+), 39 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/38179/1

diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c
index 2029b1e..f151910 100644
--- a/src/drivers/pc80/rtc/mc146818rtc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc.c
@@ -81,6 +81,14 @@
    cmos_write(((sum >> 0) & 0x0ff), cks_loc + 1);
 }

+int cmos_error(void)
+{
+	unsigned char reg_d;
+	/* See if the cmos error condition has been flagged */
+	reg_d = cmos_read(RTC_REG_D);
+	return (reg_d & RTC_VRT) == 0;
+}
+
 #define RTC_CONTROL_DEFAULT (RTC_24H)
 #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)

@@ -406,6 +414,16 @@
    return CB_SUCCESS;
 }

+/* Upon return the caller is guaranteed 244 microseconds to complete any
+ * RTC operations.  wait_uip may be called a single time prior to multiple
+ * accesses, but sequences requiring more time should call wait_uip again.
+ */
+static void wait_uip(void)
+{
+	while (cmos_read(RTC_REG_A) & RTC_UIP)
+		;
+}
+
 /*
  * If the CMOS is cleared, the rtc_reg has the invalid date. That
  * hurts some OSes. Even if we don't set USE_OPTION_TABLE, we need
diff --git a/src/drivers/pc80/rtc/mc146818rtc_boot.c b/src/drivers/pc80/rtc/mc146818rtc_boot.c
index 3000946..c2ab707 100644
--- a/src/drivers/pc80/rtc/mc146818rtc_boot.c
+++ b/src/drivers/pc80/rtc/mc146818rtc_boot.c
@@ -19,14 +19,6 @@
 #include <option_table.h>
 #endif

-int cmos_error(void)
-{
-	unsigned char reg_d;
-	/* See if the cmos error condition has been flagged */
-	reg_d = cmos_read(RTC_REG_D);
-	return (reg_d & RTC_VRT) == 0;
-}
-
 int cmos_chksum_valid(void)
 {
 #if CONFIG(USE_OPTION_TABLE)
@@ -72,22 +64,22 @@
 #error "CONFIG_MAX_REBOOT_CNT too high"
 #endif

-static inline int boot_count(uint8_t rtc_byte)
+static int boot_count(uint8_t rtc_byte)
 {
    return rtc_byte >> 4;
 }

-static inline uint8_t increment_boot_count(uint8_t rtc_byte)
+static uint8_t increment_boot_count(uint8_t rtc_byte)
 {
    return rtc_byte + (1 << 4);
 }

-static inline uint8_t boot_set_fallback(uint8_t rtc_byte)
+static uint8_t boot_set_fallback(uint8_t rtc_byte)
 {
    return rtc_byte & ~RTC_BOOT_NORMAL;
 }

-static inline int boot_use_normal(uint8_t rtc_byte)
+static int boot_use_normal(uint8_t rtc_byte)
 {
    return rtc_byte & RTC_BOOT_NORMAL;
 }
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index a8221c7..aadfae22 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -114,16 +114,6 @@
    return inb(RTC_BASE_PORT + offs + 1);
 }

-/* Upon return the caller is guaranteed 244 microseconds to complete any
- * RTC operations.  wait_uip may be called a single time prior to multiple
- * accesses, but sequences requiring more time should call wait_uip again.
- */
-static inline void wait_uip(void)
-{
-	while (cmos_read(RTC_REG_A) & RTC_UIP)
-		;
-}
-
 static inline void cmos_write_inner(unsigned char val, unsigned char addr)
 {
    int offs = 0;
@@ -135,31 +125,34 @@
    outb(val, RTC_BASE_PORT + offs + 1);
 }

-static inline void cmos_write(unsigned char val, unsigned char addr)
-{
-	u8 control_state = cmos_read(RTC_CONTROL);
-	/* There are various places where RTC bits might be hiding,
-	 * eg. the Century / AltCentury byte. So to be safe, disable
-	 * RTC before changing any value.
-	 */
-	if ((addr != RTC_CONTROL) && !(control_state & RTC_SET))
-		cmos_write_inner(control_state | RTC_SET, RTC_CONTROL);
-	cmos_write_inner(val, addr);
-	/* reset to prior configuration */
-	if ((addr != RTC_CONTROL) && !(control_state & RTC_SET))
-		cmos_write_inner(control_state, RTC_CONTROL);
-}
-
 static inline void cmos_disable_rtc(void)
 {
    u8 control_state = cmos_read(RTC_CONTROL);
-	cmos_write(control_state | RTC_SET, RTC_CONTROL);
+	if (!(control_state & RTC_SET))
+		cmos_write_inner(control_state | RTC_SET, RTC_CONTROL);
 }

static inline void cmos_enable_rtc(void)
 {
    u8 control_state = cmos_read(RTC_CONTROL);
-	cmos_write(control_state & ~RTC_SET, RTC_CONTROL);
+	if (control_state & RTC_SET)
+		cmos_write_inner(control_state & ~RTC_SET, RTC_CONTROL);
+}
+
+static inline void cmos_write(unsigned char val, unsigned char addr)
+{
+	/* There are various places where RTC bits might be hiding,
+	 * eg. the Century / AltCentury byte. So to be safe, disable
+	 * RTC before changing any value.
+	 */
+	if (addr != RTC_CONTROL)
+		cmos_disable_rtc();
+
+	cmos_write_inner(val, addr);
+
+	/* reset to prior configuration */
+	if (addr != RTC_CONTROL)
+		cmos_enable_rtc();
 }

static inline u32 cmos_read32(u8 offset)