[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: add Rcomp data structure

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39040 )

Change subject: soc/intel/tigerlake: add Rcomp data structure
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Patch Set 3: Code-Review-1

(1 comment)

This does not match what was discussed here: b/142650263. Please see comment#18.

https://review.coreboot.org/c/coreboot/+/39040/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/39040/3//COMMIT_MSG@9 
PS3, Line 9: Add Rcomp data structure in meminit to support updating rcomp resistor
           : and target values for DDR4 support.
Where is the SoC code that uses this information?