[coreboot-gerrit] Change in coreboot[master]: sb/intel/bd82x6x: Use PCI bitwise ops

[Angel Pons (Code Review)]

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/42152

to look at the new patch set (#2).

Change subject: sb/intel/bd82x6x: Use PCI bitwise ops
......................................................................

sb/intel/bd82x6x: Use PCI bitwise ops

Some cases could not be factored out while keeping reproducibility.
Also mark some potential bugs with a FIXME comment, since fixing them
while also keeping the binary unchanged is pretty much impossible.

Tested with BUILD_TIMELESS=1, Asus P8Z77-V LX2 does not change.

Change-Id: Iafe62d952a146bf53a28a1a83b87a3ae31f46720
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/bd82x6x/azalia.c
M src/southbridge/intel/bd82x6x/bootblock.c
M src/southbridge/intel/bd82x6x/early_me.c
M src/southbridge/intel/bd82x6x/early_thermal.c
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/bd82x6x/me.c
M src/southbridge/intel/bd82x6x/me_8.x.c
M src/southbridge/intel/bd82x6x/pch.c
M src/southbridge/intel/bd82x6x/pci.c
M src/southbridge/intel/bd82x6x/pcie.c
M src/southbridge/intel/bd82x6x/sata.c
M src/southbridge/intel/bd82x6x/smbus.c
M src/southbridge/intel/bd82x6x/smihandler.c
M src/southbridge/intel/bd82x6x/usb_xhci.c
14 files changed, 89 insertions(+), 165 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/42152/2