Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52771 )
Change subject: soc/amd/common: Move external oscillator config away from common ......................................................................
soc/amd/common: Move external oscillator config away from common
The usage of external oscillator has got nothing to do with Audio Co-processor (ACP). Hence move it out of common config and put it into the SoC config where it is being used.
BUG=None TEST=Build Dalboz and Vilboz mainboards.
Change-Id: I8c5d98addfba750f9ddb87a846599541b4a8340a Signed-off-by: Karthikeyan Ramasubramanian kramasub@google.com --- M src/mainboard/google/zork/variants/vilboz/variant.c M src/soc/amd/common/block/include/amdblocks/acp.h M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/fch.c 4 files changed, 6 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/52771/1
diff --git a/src/mainboard/google/zork/variants/vilboz/variant.c b/src/mainboard/google/zork/variants/vilboz/variant.c index df82698..43ca0e5 100644 --- a/src/mainboard/google/zork/variants/vilboz/variant.c +++ b/src/mainboard/google/zork/variants/vilboz/variant.c @@ -45,7 +45,7 @@
/* b:/174121847 Use external OSC to mitigate noise for WWAN sku. */ if (variant_has_wwan()) { - soc_cfg->common_config.acp_config.acp_i2s_use_external_48mhz_osc = 1; + soc_cfg->acp_i2s_use_external_48mhz_osc = 1;
/* eDP phy tuning settings */ soc_cfg->edp_phy_override = ENABLE_EDP_TUNINGSET; diff --git a/src/soc/amd/common/block/include/amdblocks/acp.h b/src/soc/amd/common/block/include/amdblocks/acp.h index f091c05..36edfa1 100644 --- a/src/soc/amd/common/block/include/amdblocks/acp.h +++ b/src/soc/amd/common/block/include/amdblocks/acp.h @@ -17,9 +17,6 @@ u8 acp_i2s_wake_enable; /* Enable ACP PME (0 = disable, 1 = enable) */ u8 acp_pme_enable; - - /* If using an external 48MHz OSC for codec, will disable internal X48M_OSC */ - bool acp_i2s_use_external_48mhz_osc; };
#endif /* AMD_COMMON_ACP_H */ diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index d59a4c8..d2ce1bc 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -257,6 +257,8 @@
/* The array index is the general purpose PCIe clock output number. */ enum gpp_clk_req_setting gpp_clk_config[GPP_CLK_OUTPUT_COUNT]; + /* If using an external 48MHz OSC for codec, will disable internal X48M_OSC */ + bool acp_i2s_use_external_48mhz_osc;
/* eDP phy tuning settings */ uint16_t edp_phy_override; diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index a871ccf..e1c0eba 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -90,12 +90,12 @@ void sb_clk_output_48Mhz(void) { u32 ctrl; - const struct soc_amd_common_config *cfg = soc_get_common_config(); + const struct soc_amd_picasso_config *cfg = config_of_soc();
ctrl = misc_read32(MISC_CLK_CNTL1); /* If used external clock source for I2S, disable the internal clock output */ - if (cfg->acp_config.acp_i2s_use_external_48mhz_osc && - cfg->acp_config.acp_pin_cfg == I2S_PINS_I2S_TDM) + if (cfg->acp_i2s_use_external_48mhz_osc && + cfg->common_config.acp_config.acp_pin_cfg == I2S_PINS_I2S_TDM) ctrl &= ~BP_X48M0_OUTPUT_EN; else ctrl |= BP_X48M0_OUTPUT_EN;