Attention is currently required from: Evgeny Zinoviev, Felix Held.
Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32604 )
Change subject: mb/apple: Add MacBook Air 5,2 (A1466) support ......................................................................
Patch Set 41:
(1 comment)
File src/mainboard/apple/macbookair5_2/early_init.c:
https://review.coreboot.org/c/coreboot/+/32604/comment/5bde9473_4f3a8759 PS41, Line 71: memcpy(&spd[0], memory, 256); : memcpy(&spd[2], memory, 256); From the SPDs, the Hynix configuration uses 2Gbit chips with an IO width of 8 bits/chip which means it uses 8 chips/channel (64 bits/channel) and 2 channels to total 4GiB. The Samsung configuration uses 4Gbit chips and also has an IO width of 8 bits/chip, meaning only 8 chips in a single channel are required to get 4GiB.
This unconditionally populates the SPDs of both channels, so I would assume that raminit would try and init both channels even if only one is being used. Glancing through the raminit code it seems like coreboot would just disable the failing channel (failing because it isn't populated) so it still might boot, but I guess time could be saved by copying the SPD for the second channel only if it is being used, which could be determined based on the GPIO straps and the channel configuration of the corresponding chips