[coreboot-gerrit] Change in coreboot[master]: src/soc/intel: Enable PCH M.2 RTD3 flow to allow system to enter S0i3.2

[Duncan Laurie (Code Review)]

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43600 )

Change subject: src/soc/intel: Enable PCH M.2 RTD3 flow to allow system to enter S0i3.2
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Patch Set 10:
> Patch Set 10:
>
> Hi Duncan & Shreesh, any update this week?

Patches have been at https://review.coreboot.org/c/coreboot/+/46262/9 but they need tested on real hardware.