[coreboot-gerrit] [M] Change in coreboot[main]: soc/intel: Add check to pmc_/gpe0_different_values

[Subrata Banik (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Eric Lai, Intel coreboot Reviewers, Jakub Czapiga, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Matt DeVillier, Nick Vaccaro, Pranava Y N, Sean Rhodes, Tarun, Werner Zeh.

Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86164?usp=email )

Change subject: soc/intel: Add check to pmc_/gpe0_different_values
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Patch Set 3:

(2 comments)

Patchset:

PS2:
> right, zero is a valid GPE route. […]

Acknowledged

Commit Message:

https://review.coreboot.org/c/coreboot/+/86164/comment/7eded514_39da2c85?usp... :
PS2, Line 14: This prevents potential issues arising from a zeroed configuration
> > > Both the commit message and the code are wrong to me then.  […]

@matt, can you please test the latest patchset?