[coreboot-gerrit] Change in coreboot[master]: soc/intel/cmn/pch/lockdown: Implement LPC lock down configuration

[Werner Zeh (Code Review)]

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Eric Lai, Lean Sheng Tan.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63630 )

Change subject: soc/intel/cmn/pch/lockdown: Implement LPC lock down configuration
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Patch Set 1:

(1 comment)

File src/soc/intel/common/pch/lockdown/lockdown.c:

https://review.coreboot.org/c/coreboot/+/63630/comment/a0d348ac_282cb27f 
PS1, Line 94: static void lpc_lockdown_config(int chipset_lockdown)
            : {
            : 	/* Set BIOS Interface Lock, BIOS Lock */
            : 	if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) {
            : 		/* BIOS Interface Lock */
            : 		lpc_set_bios_interface_lock_down();
            : 
            : 		/* Only allow writes in SMM */
            : 		if (CONFIG(BOOTMEDIA_SMM_BWP))
            : 			lpc_set_eiss();
            : 
            : 		/* BIOS Lock */
            : 		lpc_set_lock_enable();
            : 	}
            : }
This generic code is executed even by platforms where there is no LPC at all (for instance elkhartlake). How is the behavior on these platforms?