Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38452 )
Change subject: soc/intel/tigerlake: Add pinmux support ......................................................................
Patch Set 9: Code-Review-1
(3 comments)
https://review.coreboot.org/c/coreboot/+/38452/9/src/soc/intel/tigerlake/inc... File src/soc/intel/tigerlake/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/c/coreboot/+/38452/9/src/soc/intel/tigerlake/inc... PS9, Line 297: * mux for these pins. Why? I don't understand why this is needed. We should be able to configure the pins natively. All these magic numbers look just like register values which is likely assuming a certain use which may not be in alignment with board design.
https://review.coreboot.org/c/coreboot/+/38452/9/src/soc/intel/tigerlake/inc... PS9, Line 300: VER2 What does this mean?
https://review.coreboot.org/c/coreboot/+/38452/9/src/soc/intel/tigerlake/inc... PS9, Line 301: 0x290C0201 What do these magic values represent?