Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48847 )
Change subject: soc/intel/alderlake: Update CPU microcode patch base address/size
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Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48847/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/48847/1//COMMIT_MSG@9
PS1, Line 9: This patch updates CPU microcode patch base address/size to FSP-S
: UPD to have second microcode patch loaded successfully to enable
: Mcheck flow
Are we potentially missing this from TGL as well? We have rarely, if ever, used the FSP's ucode load […]
Mcheck flow is different than previous platform.
In past SGX was the reason to load the second patch load.
Bios should load the 2nd ucode after bios done indication is set and before bios cpl is sent to pcu.
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Gerrit-Project: coreboot
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