[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add romstage common stage file

[Bernardo Perez Priego (Code Review)]

Attention is currently required from: Nico Huber, Furquan Shaikh, Patrick Rudolph, Tim Wawrzynczak, Angel Pons, Michael Niewöhner, Aaron Durbin.
Hello Bora Guvendik, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Selma Bensaid, Angel Pons, Subrata Banik, Varun Joshi, Michael Niewöhner, Aamir Bohra, Aaron Durbin, Patrick Rudolph, Martin Roth, Tim Wawrzynczak, Usha P,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/37628

to look at the new patch set (#22).

Change subject: soc/intel/common: Add romstage common stage file
......................................................................

soc/intel/common: Add romstage common stage file

This patch will ensures all intel soc is using common stage
files to make coreboot design flow align across all socs.

CPU, SA, PCH, MCH programming sequence might be different between
socs but the function call should route from same location across
all soc.

Signed-off-by: Bernardo Perez Priego 
Change-Id: I06d43ac29f5e87ce731a470e5e145adea07ece4c
---
M src/soc/intel/common/Kconfig.common
A src/soc/intel/common/basecode/include/intelbasecode/romstage.h
A src/soc/intel/common/basecode/romstage/Kconfig
A src/soc/intel/common/basecode/romstage/Makefile.inc
A src/soc/intel/common/basecode/romstage/romstage.c
5 files changed, 174 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/37628/22