Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39314 )
Change subject: soc/mediatek/mt8183: Improve the AC timing of DRAMC ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39314/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39314/1//COMMIT_MSG@8 PS1, Line 8: : 1. Set more AC timing items to make the system more stable. : 2. Fix wrong setting of DRS config. Could you separate these 2 items into 2 CLs?
https://review.coreboot.org/c/coreboot/+/39314/1/src/soc/mediatek/mt8183/emi... File src/soc/mediatek/mt8183/emi.c:
https://review.coreboot.org/c/coreboot/+/39314/1/src/soc/mediatek/mt8183/emi... PS1, Line 354: clrsetbits_le32 Use clrsetbits32() instead. Seel CB:37433.