Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34754
to look at the new patch set (#3).
Change subject: soc/intel/cannonlake: Add provision to skip postcar and load ramstage ......................................................................
soc/intel/cannonlake: Add provision to skip postcar and load ramstage
This patch adds required provision in soc code to pick ramstage directly from romstage and avoid postcar as intermediate stage for car tear down.
Also remove CAR global migration when ramstage stage is used (without intermediate postcar stage)
When a platform is not using postcar stage (!HAVE_POSTCAR) it will use ramstage hence it's by definition not tearing down cache-as-ram from within romstage prior to loading ramstage. Because of this property there's no need to migrate CAR_GLOBAL variables to cbmem.
Change-Id: I6f1d93ae0f8d957bf9c15e358bc13039a300c4ca Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/cannonlake/romstage/romstage.c 1 file changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/34754/3