Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37895 )
Change subject: arch/x86: Top align bootblock program ......................................................................
Patch Set 4:
(1 comment)
It looks like you're being more aggressive than necessary in adding code within .bootblock_top, e.g. the CAR setup. Is this primarily to optimize space, or maybe I missed something?
Marshall, auxiliary utilility (flashrom) would like to see id.S at end of flash image. This condition will not be satisfied with amd/picasso where x86 bootblock will not reside at the end of the flash image. Do you want to leave id.S out from amd/picasso bootblock?
I'm completely removing the no-bootblock scenario from picasso right now so I need to decide what that ultimately looks like. We'll require a fully functional bootblock.elf to generate the compressed image for the PSP, and currently the arrangement places a traditional (unused) bootblock, with ID etc., at the top of flash in addition to the compressed image in amdfw.rom. The good news is I have bootblock down to about 32K now, and am not reusing the earlyram space for romstage as in the current WIP patches. (I hope to get that stack cleaned up and pushed today.)
https://review.coreboot.org/c/coreboot/+/37895/4/src/cpu/x86/16bit/reset16.l... File src/cpu/x86/16bit/reset16.ld:
https://review.coreboot.org/c/coreboot/+/37895/4/src/cpu/x86/16bit/reset16.l... PS4, Line 46: ROMLOC_MIN = CONFIG_X86_RESET_VECTOR - 0xf0 - (PROGRAM_SZ + EARLYASM_SZ); I would've thought this would bee somewhat circular but I can't make it break, I guess I learned something.
Did you mean to insert 2 blank lines above?